NANO102/112 BSP V3.03.003
The Board Support Package for Nano102/112 Series
Modules | Macros
NANO102/112 Peripheral Memory Map
Collaboration diagram for NANO102/112 Peripheral Memory Map:

Modules

 NANO102/112 Peripheral Declaration
 

Macros

#define FLASH_BASE   ((uint32_t)0x00000000)
 Flash base address. More...
 
#define SRAM_BASE   ((uint32_t)0x20000000)
 SRAM base address. More...
 
#define APB1PERIPH_BASE   ((uint32_t)0x40000000)
 APB1 base address. More...
 
#define APB2PERIPH_BASE   ((uint32_t)0x40100000)
 APB2 base address. More...
 
#define AHBPERIPH_BASE   ((uint32_t)0x50000000)
 AHB base address. More...
 
#define WDT_BASE   (APB1PERIPH_BASE + 0x04000)
 WDT register base address. More...
 
#define WWDT_BASE   (APB1PERIPH_BASE + 0x04100)
 WWDT register base address. More...
 
#define RTC_BASE   (APB1PERIPH_BASE + 0x08000)
 RTC register base address. More...
 
#define TIMER0_BASE   (APB1PERIPH_BASE + 0x10000)
 TIMER0 register base address. More...
 
#define TIMER1_BASE   (APB1PERIPH_BASE + 0x10100)
 TIMER1 register base address. More...
 
#define I2C0_BASE   (APB1PERIPH_BASE + 0x20000)
 I2C0 register base address. More...
 
#define SPI0_BASE   (APB1PERIPH_BASE + 0x30000)
 SPI0 register base address. More...
 
#define PWM0_BASE   (APB1PERIPH_BASE + 0x40000)
 PWM0 register base address. More...
 
#define UART0_BASE   (APB1PERIPH_BASE + 0x50000)
 UART0 register base address. More...
 
#define LCD_BASE   (APB1PERIPH_BASE + 0xB0000)
 LCD register base address. More...
 
#define ADC_BASE   (APB1PERIPH_BASE + 0xE0000)
 ADC register base address. More...
 
#define TIMER2_BASE   (APB2PERIPH_BASE + 0x10000)
 TIMER2 register base address. More...
 
#define TIMER3_BASE   (APB2PERIPH_BASE + 0x10100)
 TIMER3 register base address. More...
 
#define I2C1_BASE   (APB2PERIPH_BASE + 0x20000)
 I2C1 register base address. More...
 
#define SPI1_BASE   (APB2PERIPH_BASE + 0x30000)
 SPI1 register base address. More...
 
#define UART1_BASE   (APB2PERIPH_BASE + 0x50000)
 UART1 register base address. More...
 
#define SC0_BASE   (APB2PERIPH_BASE + 0x90000)
 SC0 register base address. More...
 
#define SC1_BASE   (APB2PERIPH_BASE + 0xB0000)
 SC1 register base address. More...
 
#define ACMP_BASE   (APB2PERIPH_BASE + 0xD0000)
 ACMP register base address. More...
 
#define SYS_BASE   (AHBPERIPH_BASE + 0x00000)
 SYS register base address. More...
 
#define CLK_BASE   (AHBPERIPH_BASE + 0x00200)
 CLK register base address. More...
 
#define INTID_BASE   (AHBPERIPH_BASE + 0x00300)
 INT register base address. More...
 
#define GPIOA_BASE   (AHBPERIPH_BASE + 0x04000)
 GPIO port A register base address. More...
 
#define GPIOB_BASE   (AHBPERIPH_BASE + 0x04040)
 GPIO port B register base address. More...
 
#define GPIOC_BASE   (AHBPERIPH_BASE + 0x04080)
 GPIO port C register base address. More...
 
#define GPIOD_BASE   (AHBPERIPH_BASE + 0x040C0)
 GPIO port D register base address. More...
 
#define GPIOE_BASE   (AHBPERIPH_BASE + 0x04100)
 GPIO port E register base address. More...
 
#define GPIOF_BASE   (AHBPERIPH_BASE + 0x04140)
 GPIO port F register base address. More...
 
#define GPIODBNCE_BASE   (AHBPERIPH_BASE + 0x04180)
 GPIO debounce register base address. More...
 
#define GPIO_PIN_DATA_BASE   (AHBPERIPH_BASE + 0x04200)
 GPIO bit access register base address. More...
 
#define PDMA0_BASE   (AHBPERIPH_BASE + 0x08000)
 PDMA0 register base address. More...
 
#define PDMA1_BASE   (AHBPERIPH_BASE + 0x08100)
 PDMA1 register base address. More...
 
#define PDMA2_BASE   (AHBPERIPH_BASE + 0x08200)
 PDMA2 register base address. More...
 
#define PDMA3_BASE   (AHBPERIPH_BASE + 0x08300)
 PDMA3 register base address. More...
 
#define PDMA4_BASE   (AHBPERIPH_BASE + 0x08400)
 PDMA4 register base address. More...
 
#define PDMACRC_BASE   (AHBPERIPH_BASE + 0x08E00)
 PDMA global control register base address. More...
 
#define PDMAGCR_BASE   (AHBPERIPH_BASE + 0x08F00)
 PDMA CRC register base address. More...
 
#define FMC_BASE   (AHBPERIPH_BASE + 0x0C000)
 FMC register base address. More...
 

Detailed Description

Memory Mapped Structure for NANO102/112 Series Peripheral

Macro Definition Documentation

◆ ACMP_BASE

#define ACMP_BASE   (APB2PERIPH_BASE + 0xD0000)

ACMP register base address.

Definition at line 10601 of file Nano1X2Series.h.

◆ ADC_BASE

#define ADC_BASE   (APB1PERIPH_BASE + 0xE0000)

ADC register base address.

Definition at line 10592 of file Nano1X2Series.h.

◆ AHBPERIPH_BASE

#define AHBPERIPH_BASE   ((uint32_t)0x50000000)

AHB base address.

Peripheral memory map

Definition at line 10580 of file Nano1X2Series.h.

◆ APB1PERIPH_BASE

#define APB1PERIPH_BASE   ((uint32_t)0x40000000)

APB1 base address.

Definition at line 10576 of file Nano1X2Series.h.

◆ APB2PERIPH_BASE

#define APB2PERIPH_BASE   ((uint32_t)0x40100000)

APB2 base address.

Definition at line 10577 of file Nano1X2Series.h.

◆ CLK_BASE

#define CLK_BASE   (AHBPERIPH_BASE + 0x00200)

CLK register base address.

Definition at line 10604 of file Nano1X2Series.h.

◆ FLASH_BASE

#define FLASH_BASE   ((uint32_t)0x00000000)

Flash base address.

<Peripheral and SRAM base address

Definition at line 10574 of file Nano1X2Series.h.

◆ FMC_BASE

#define FMC_BASE   (AHBPERIPH_BASE + 0x0C000)

FMC register base address.

Definition at line 10621 of file Nano1X2Series.h.

◆ GPIO_PIN_DATA_BASE

#define GPIO_PIN_DATA_BASE   (AHBPERIPH_BASE + 0x04200)

GPIO bit access register base address.

Definition at line 10613 of file Nano1X2Series.h.

◆ GPIOA_BASE

#define GPIOA_BASE   (AHBPERIPH_BASE + 0x04000)

GPIO port A register base address.

Definition at line 10606 of file Nano1X2Series.h.

◆ GPIOB_BASE

#define GPIOB_BASE   (AHBPERIPH_BASE + 0x04040)

GPIO port B register base address.

Definition at line 10607 of file Nano1X2Series.h.

◆ GPIOC_BASE

#define GPIOC_BASE   (AHBPERIPH_BASE + 0x04080)

GPIO port C register base address.

Definition at line 10608 of file Nano1X2Series.h.

◆ GPIOD_BASE

#define GPIOD_BASE   (AHBPERIPH_BASE + 0x040C0)

GPIO port D register base address.

Definition at line 10609 of file Nano1X2Series.h.

◆ GPIODBNCE_BASE

#define GPIODBNCE_BASE   (AHBPERIPH_BASE + 0x04180)

GPIO debounce register base address.

Definition at line 10612 of file Nano1X2Series.h.

◆ GPIOE_BASE

#define GPIOE_BASE   (AHBPERIPH_BASE + 0x04100)

GPIO port E register base address.

Definition at line 10610 of file Nano1X2Series.h.

◆ GPIOF_BASE

#define GPIOF_BASE   (AHBPERIPH_BASE + 0x04140)

GPIO port F register base address.

Definition at line 10611 of file Nano1X2Series.h.

◆ I2C0_BASE

#define I2C0_BASE   (APB1PERIPH_BASE + 0x20000)

I2C0 register base address.

Definition at line 10587 of file Nano1X2Series.h.

◆ I2C1_BASE

#define I2C1_BASE   (APB2PERIPH_BASE + 0x20000)

I2C1 register base address.

Definition at line 10596 of file Nano1X2Series.h.

◆ INTID_BASE

#define INTID_BASE   (AHBPERIPH_BASE + 0x00300)

INT register base address.

Definition at line 10605 of file Nano1X2Series.h.

◆ LCD_BASE

#define LCD_BASE   (APB1PERIPH_BASE + 0xB0000)

LCD register base address.

Definition at line 10591 of file Nano1X2Series.h.

◆ PDMA0_BASE

#define PDMA0_BASE   (AHBPERIPH_BASE + 0x08000)

PDMA0 register base address.

Definition at line 10614 of file Nano1X2Series.h.

◆ PDMA1_BASE

#define PDMA1_BASE   (AHBPERIPH_BASE + 0x08100)

PDMA1 register base address.

Definition at line 10615 of file Nano1X2Series.h.

◆ PDMA2_BASE

#define PDMA2_BASE   (AHBPERIPH_BASE + 0x08200)

PDMA2 register base address.

Definition at line 10616 of file Nano1X2Series.h.

◆ PDMA3_BASE

#define PDMA3_BASE   (AHBPERIPH_BASE + 0x08300)

PDMA3 register base address.

Definition at line 10617 of file Nano1X2Series.h.

◆ PDMA4_BASE

#define PDMA4_BASE   (AHBPERIPH_BASE + 0x08400)

PDMA4 register base address.

Definition at line 10618 of file Nano1X2Series.h.

◆ PDMACRC_BASE

#define PDMACRC_BASE   (AHBPERIPH_BASE + 0x08E00)

PDMA global control register base address.

Definition at line 10619 of file Nano1X2Series.h.

◆ PDMAGCR_BASE

#define PDMAGCR_BASE   (AHBPERIPH_BASE + 0x08F00)

PDMA CRC register base address.

Definition at line 10620 of file Nano1X2Series.h.

◆ PWM0_BASE

#define PWM0_BASE   (APB1PERIPH_BASE + 0x40000)

PWM0 register base address.

Definition at line 10589 of file Nano1X2Series.h.

◆ RTC_BASE

#define RTC_BASE   (APB1PERIPH_BASE + 0x08000)

RTC register base address.

Definition at line 10584 of file Nano1X2Series.h.

◆ SC0_BASE

#define SC0_BASE   (APB2PERIPH_BASE + 0x90000)

SC0 register base address.

Definition at line 10599 of file Nano1X2Series.h.

◆ SC1_BASE

#define SC1_BASE   (APB2PERIPH_BASE + 0xB0000)

SC1 register base address.

Definition at line 10600 of file Nano1X2Series.h.

◆ SPI0_BASE

#define SPI0_BASE   (APB1PERIPH_BASE + 0x30000)

SPI0 register base address.

Definition at line 10588 of file Nano1X2Series.h.

◆ SPI1_BASE

#define SPI1_BASE   (APB2PERIPH_BASE + 0x30000)

SPI1 register base address.

Definition at line 10597 of file Nano1X2Series.h.

◆ SRAM_BASE

#define SRAM_BASE   ((uint32_t)0x20000000)

SRAM base address.

Definition at line 10575 of file Nano1X2Series.h.

◆ SYS_BASE

#define SYS_BASE   (AHBPERIPH_BASE + 0x00000)

SYS register base address.

Definition at line 10603 of file Nano1X2Series.h.

◆ TIMER0_BASE

#define TIMER0_BASE   (APB1PERIPH_BASE + 0x10000)

TIMER0 register base address.

Definition at line 10585 of file Nano1X2Series.h.

◆ TIMER1_BASE

#define TIMER1_BASE   (APB1PERIPH_BASE + 0x10100)

TIMER1 register base address.

Definition at line 10586 of file Nano1X2Series.h.

◆ TIMER2_BASE

#define TIMER2_BASE   (APB2PERIPH_BASE + 0x10000)

TIMER2 register base address.

Definition at line 10594 of file Nano1X2Series.h.

◆ TIMER3_BASE

#define TIMER3_BASE   (APB2PERIPH_BASE + 0x10100)

TIMER3 register base address.

Definition at line 10595 of file Nano1X2Series.h.

◆ UART0_BASE

#define UART0_BASE   (APB1PERIPH_BASE + 0x50000)

UART0 register base address.

Definition at line 10590 of file Nano1X2Series.h.

◆ UART1_BASE

#define UART1_BASE   (APB2PERIPH_BASE + 0x50000)

UART1 register base address.

Definition at line 10598 of file Nano1X2Series.h.

◆ WDT_BASE

#define WDT_BASE   (APB1PERIPH_BASE + 0x04000)

WDT register base address.

Definition at line 10582 of file Nano1X2Series.h.

◆ WWDT_BASE

#define WWDT_BASE   (APB1PERIPH_BASE + 0x04100)

WWDT register base address.

Definition at line 10583 of file Nano1X2Series.h.