NANO102/112 BSP V3.03.003
The Board Support Package for Nano102/112 Series
Modules | Data Structures | Macros | Typedefs | Enumerations
Device CMSIS Definitions
Collaboration diagram for Device CMSIS Definitions:

Modules

 NANO102/112 Peripherals
 

Data Structures

struct  ADC_T
 

Macros

#define __CM0_REV   0x0201
 
#define __NVIC_PRIO_BITS   2
 
#define __Vendor_SysTickConfig   0
 
#define __MPU_PRESENT   0
 
#define __FPU_PRESENT   0
 

Typedefs

typedef enum IRQn IRQn_Type
 

Enumerations

enum  IRQn {
  NonMaskableInt_IRQn = -14 ,
  HardFault_IRQn = -13 ,
  SVCall_IRQn = -5 ,
  PendSV_IRQn = -2 ,
  SysTick_IRQn = -1 ,
  BOD_IRQn = 0 ,
  WDT_IRQn = 1 ,
  EINT0_IRQn = 2 ,
  EINT1_IRQn = 3 ,
  GPABC_IRQn = 4 ,
  GPDEF_IRQn = 5 ,
  PWM0_IRQn = 6 ,
  TMR0_IRQn = 8 ,
  TMR1_IRQn = 9 ,
  TMR2_IRQn = 10 ,
  TMR3_IRQn = 11 ,
  UART0_IRQn = 12 ,
  UART1_IRQn = 13 ,
  SPI0_IRQn = 14 ,
  SPI1_IRQn = 15 ,
  HIRC_IRQn = 17 ,
  I2C0_IRQn = 18 ,
  I2C1_IRQn = 19 ,
  SC0_IRQn = 21 ,
  SC1_IRQn = 22 ,
  LCD_IRQn = 25 ,
  PDMA_IRQn = 26 ,
  PDWU_IRQn = 28 ,
  ADC_IRQn = 29 ,
  ACMP_IRQn = 30 ,
  RTC_IRQn = 31
}
 
#define ADC_RESULT_RSLT_Pos   (0)
 
#define ADC_RESULT_RSLT_Msk   (0xffful << ADC_RESULT_RSLT_Pos)
 
#define ADC_RESULT_VALID_Pos   (16)
 
#define ADC_RESULT_VALID_Msk   (0x1ul << ADC_RESULT_VALID_Pos)
 
#define ADC_RESULT_OVERRUN_Pos   (17)
 
#define ADC_RESULT_OVERRUN_Msk   (0x1ul << ADC_RESULT_OVERRUN_Pos)
 
#define ADC_CR_ADEN_Pos   (0)
 
#define ADC_CR_ADEN_Msk   (0x1ul << ADC_CR_ADEN_Pos)
 
#define ADC_CR_ADIE_Pos   (1)
 
#define ADC_CR_ADIE_Msk   (0x1ul << ADC_CR_ADIE_Pos)
 
#define ADC_CR_ADMD_Pos   (2)
 
#define ADC_CR_ADMD_Msk   (0x3ul << ADC_CR_ADMD_Pos)
 
#define ADC_CR_TRGS_Pos   (4)
 
#define ADC_CR_TRGS_Msk   (0x3ul << ADC_CR_TRGS_Pos)
 
#define ADC_CR_TRGCOND_Pos   (6)
 
#define ADC_CR_TRGCOND_Msk   (0x3ul << ADC_CR_TRGCOND_Pos)
 
#define ADC_CR_TRGE_Pos   (8)
 
#define ADC_CR_TRGE_Msk   (0x1ul << ADC_CR_TRGE_Pos)
 
#define ADC_CR_PTEN_Pos   (9)
 
#define ADC_CR_PTEN_Msk   (0x1ul << ADC_CR_PTEN_Pos)
 
#define ADC_CR_DIFF_Pos   (10)
 
#define ADC_CR_DIFF_Msk   (0x1ul << ADC_CR_DIFF_Pos)
 
#define ADC_CR_ADST_Pos   (11)
 
#define ADC_CR_ADST_Msk   (0x1ul << ADC_CR_ADST_Pos)
 
#define ADC_CR_TMSEL_Pos   (12)
 
#define ADC_CR_TMSEL_Msk   (0x3ul << ADC_CR_TMSEL_Pos)
 
#define ADC_CR_TMTRGMOD_Pos   (15)
 
#define ADC_CR_TMTRGMOD_Msk   (0x1ul << ADC_CR_TMTRGMOD_Pos)
 
#define ADC_CR_REFSEL_Pos   (16)
 
#define ADC_CR_REFSEL_Msk   (0x3ul << ADC_CR_REFSEL_Pos)
 
#define ADC_CR_RESSEL_Pos   (18)
 
#define ADC_CR_RESSEL_Msk   (0x3ul << ADC_CR_RESSEL_Pos)
 
#define ADC_CR_TMPDMACNT_Pos   (24)
 
#define ADC_CR_TMPDMACNT_Msk   (0xfful << ADC_CR_TMPDMACNT_Pos)
 
#define ADC_CHEN_CHEN0_Pos   (0)
 
#define ADC_CHEN_CHEN0_Msk   (0x1ul << ADC_CHEN_CHEN0_Pos)
 
#define ADC_CMPR_CMPEN_Pos   (0)
 
#define ADC_CMPR_CMPEN_Msk   (0x1ul << ADC_CMPR_CMPEN_Pos)
 
#define ADC_CMPR_CMPIE_Pos   (1)
 
#define ADC_CMPR_CMPIE_Msk   (0x1ul << ADC_CMPR_CMPIE_Pos)
 
#define ADC_CMPR_CMPCOND_Pos   (2)
 
#define ADC_CMPR_CMPCOND_Msk   (0x1ul << ADC_CMPR_CMPCOND_Pos)
 
#define ADC_CMPR_CMPCH_Pos   (3)
 
#define ADC_CMPR_CMPCH_Msk   (0x1ful << ADC_CMPR_CMPCH_Pos)
 
#define ADC_CMPR_CMPMATCNT_Pos   (8)
 
#define ADC_CMPR_CMPMATCNT_Msk   (0xful << ADC_CMPR_CMPMATCNT_Pos)
 
#define ADC_CMPR_CMPD_Pos   (16)
 
#define ADC_CMPR_CMPD_Msk   (0xffful << ADC_CMPR_CMPD_Pos)
 
#define ADC_SR_ADF_Pos   (0)
 
#define ADC_SR_ADF_Msk   (0x1ul << ADC_SR_ADF_Pos)
 
#define ADC_SR_CMPF0_Pos   (1)
 
#define ADC_SR_CMPF0_Msk   (0x1ul << ADC_SR_CMPF0_Pos)
 
#define ADC_SR_CMPF1_Pos   (2)
 
#define ADC_SR_CMPF1_Msk   (0x1ul << ADC_SR_CMPF1_Pos)
 
#define ADC_SR_BUSY_Pos   (3)
 
#define ADC_SR_BUSY_Msk   (0x1ul << ADC_SR_BUSY_Pos)
 
#define ADC_SR_CHANNEL_Pos   (4)
 
#define ADC_SR_CHANNEL_Msk   (0x1ful << ADC_SR_CHANNEL_Pos)
 
#define ADC_SR_INITRDY_Pos   (16)
 
#define ADC_SR_INITRDY_Msk   (0x1ul << ADC_SR_INITRDY_Pos)
 
#define ADC_PDMA_AD_PDMA_Pos   (0)
 
#define ADC_PDMA_AD_PDMA_Msk   (0xffful << ADC_PDMA_AD_PDMA_Pos)
 
#define ADC_PWRCTL_PWUPRDY_Pos   (0)
 
#define ADC_PWRCTL_PWUPRDY_Msk   (0x1ul << ADC_PWRCTL_PWUPRDY_Pos)
 
#define ADC_PWRCTL_PWDCALEN_Pos   (1)
 
#define ADC_PWRCTL_PWDCALEN_Msk   (0x1ul << ADC_PWRCTL_PWDCALEN_Pos)
 
#define ADC_PWRCTL_PWDMOD_Pos   (2)
 
#define ADC_PWRCTL_PWDMOD_Msk   (0x3ul << ADC_PWRCTL_PWDMOD_Pos)
 
#define ADC_CALCTL_CALEN_Pos   (0)
 
#define ADC_CALCTL_CALEN_Msk   (0x1ul << ADC_CALCTL_CALEN_Pos)
 
#define ADC_CALCTL_CALSTART_Pos   (1)
 
#define ADC_CALCTL_CALSTART_Msk   (0x1ul << ADC_CALCTL_CALSTART_Pos)
 
#define ADC_CALCTL_CALDONE_Pos   (2)
 
#define ADC_CALCTL_CALDONE_Msk   (0x1ul << ADC_CALCTL_CALDONE_Pos)
 
#define ADC_CALCTL_CALSEL_Pos   (3)
 
#define ADC_CALCTL_CALSEL_Msk   (0x1ul << ADC_CALCTL_CALSEL_Pos)
 
#define ADC_CALWORD_CALWORD_Pos   (0)
 
#define ADC_CALWORD_CALWORD_Msk   (0x7ful << ADC_CALWORD_CALWORD_Pos)
 
#define ADC_SMPLCNT0_CH0SAMPCNT_Pos   (0)
 
#define ADC_SMPLCNT0_CH0SAMPCNT_Msk   (0xful << ADC_SMPLCNT0_CH0SAMPCNT_Pos)
 
#define ADC_SMPLCNT1_CH8SAMPCNT_Pos   (0)
 
#define ADC_SMPLCNT1_CH8SAMPCNT_Msk   (0xful << ADC_SMPLCNT1_CH8SAMPCNT_Pos)
 
#define ADC_SMPLCNT1_INTCHSAMPCNT_Pos   (16)
 
#define ADC_SMPLCNT1_INTCHSAMPCNT_Msk   (0xful << ADC_SMPLCNT1_INTCHSAMPCNT_Pos)
 

Detailed Description

Configuration of the Cortex-M0 Processor and Core Peripherals

Macro Definition Documentation

◆ __CM0_REV

#define __CM0_REV   0x0201

Core Revision r2p1

Definition at line 124 of file Nano1X2Series.h.

◆ __FPU_PRESENT

#define __FPU_PRESENT   0

FPU present or not

Definition at line 128 of file Nano1X2Series.h.

◆ __MPU_PRESENT

#define __MPU_PRESENT   0

MPU present or not

Definition at line 127 of file Nano1X2Series.h.

◆ __NVIC_PRIO_BITS

#define __NVIC_PRIO_BITS   2

Number of Bits used for Priority Levels

Definition at line 125 of file Nano1X2Series.h.

◆ __Vendor_SysTickConfig

#define __Vendor_SysTickConfig   0

Set to 1 if different SysTick Config is used

Definition at line 126 of file Nano1X2Series.h.

◆ ADC_CALCTL_CALDONE_Msk

#define ADC_CALCTL_CALDONE_Msk   (0x1ul << ADC_CALCTL_CALDONE_Pos)

ADC_T::CALCTL: CALDONE Mask

Definition at line 876 of file Nano1X2Series.h.

◆ ADC_CALCTL_CALDONE_Pos

#define ADC_CALCTL_CALDONE_Pos   (2)

ADC_T::CALCTL: CALDONE Position

Definition at line 875 of file Nano1X2Series.h.

◆ ADC_CALCTL_CALEN_Msk

#define ADC_CALCTL_CALEN_Msk   (0x1ul << ADC_CALCTL_CALEN_Pos)

ADC_T::CALCTL: CALEN Mask

Definition at line 870 of file Nano1X2Series.h.

◆ ADC_CALCTL_CALEN_Pos

#define ADC_CALCTL_CALEN_Pos   (0)

ADC_T::CALCTL: CALEN Position

Definition at line 869 of file Nano1X2Series.h.

◆ ADC_CALCTL_CALSEL_Msk

#define ADC_CALCTL_CALSEL_Msk   (0x1ul << ADC_CALCTL_CALSEL_Pos)

ADC_T::CALCTL: CALSEL Mask

Definition at line 879 of file Nano1X2Series.h.

◆ ADC_CALCTL_CALSEL_Pos

#define ADC_CALCTL_CALSEL_Pos   (3)

ADC_T::CALCTL: CALSEL Position

Definition at line 878 of file Nano1X2Series.h.

◆ ADC_CALCTL_CALSTART_Msk

#define ADC_CALCTL_CALSTART_Msk   (0x1ul << ADC_CALCTL_CALSTART_Pos)

ADC_T::CALCTL: CALSTART Mask

Definition at line 873 of file Nano1X2Series.h.

◆ ADC_CALCTL_CALSTART_Pos

#define ADC_CALCTL_CALSTART_Pos   (1)

ADC_T::CALCTL: CALSTART Position

Definition at line 872 of file Nano1X2Series.h.

◆ ADC_CALWORD_CALWORD_Msk

#define ADC_CALWORD_CALWORD_Msk   (0x7ful << ADC_CALWORD_CALWORD_Pos)

ADC_T::CALWORD: CALWORD Mask

Definition at line 882 of file Nano1X2Series.h.

◆ ADC_CALWORD_CALWORD_Pos

#define ADC_CALWORD_CALWORD_Pos   (0)

ADC_T::CALWORD: CALWORD Position

Definition at line 881 of file Nano1X2Series.h.

◆ ADC_CHEN_CHEN0_Msk

#define ADC_CHEN_CHEN0_Msk   (0x1ul << ADC_CHEN_CHEN0_Pos)

ADC_T::CHEN: CHEN0 Mask

Definition at line 819 of file Nano1X2Series.h.

◆ ADC_CHEN_CHEN0_Pos

#define ADC_CHEN_CHEN0_Pos   (0)

ADC_T::CHEN: CHEN0 Position

Definition at line 818 of file Nano1X2Series.h.

◆ ADC_CMPR_CMPCH_Msk

#define ADC_CMPR_CMPCH_Msk   (0x1ful << ADC_CMPR_CMPCH_Pos)

ADC_T::CMPR: CMPCH Mask

Definition at line 831 of file Nano1X2Series.h.

◆ ADC_CMPR_CMPCH_Pos

#define ADC_CMPR_CMPCH_Pos   (3)

ADC_T::CMPR: CMPCH Position

Definition at line 830 of file Nano1X2Series.h.

◆ ADC_CMPR_CMPCOND_Msk

#define ADC_CMPR_CMPCOND_Msk   (0x1ul << ADC_CMPR_CMPCOND_Pos)

ADC_T::CMPR: CMPCOND Mask

Definition at line 828 of file Nano1X2Series.h.

◆ ADC_CMPR_CMPCOND_Pos

#define ADC_CMPR_CMPCOND_Pos   (2)

ADC_T::CMPR: CMPCOND Position

Definition at line 827 of file Nano1X2Series.h.

◆ ADC_CMPR_CMPD_Msk

#define ADC_CMPR_CMPD_Msk   (0xffful << ADC_CMPR_CMPD_Pos)

ADC_T::CMPR: CMPD Mask

Definition at line 837 of file Nano1X2Series.h.

◆ ADC_CMPR_CMPD_Pos

#define ADC_CMPR_CMPD_Pos   (16)

ADC_T::CMPR: CMPD Position

Definition at line 836 of file Nano1X2Series.h.

◆ ADC_CMPR_CMPEN_Msk

#define ADC_CMPR_CMPEN_Msk   (0x1ul << ADC_CMPR_CMPEN_Pos)

ADC_T::CMPR: CMPEN Mask

Definition at line 822 of file Nano1X2Series.h.

◆ ADC_CMPR_CMPEN_Pos

#define ADC_CMPR_CMPEN_Pos   (0)

ADC_T::CMPR: CMPEN Position

Definition at line 821 of file Nano1X2Series.h.

◆ ADC_CMPR_CMPIE_Msk

#define ADC_CMPR_CMPIE_Msk   (0x1ul << ADC_CMPR_CMPIE_Pos)

ADC_T::CMPR: CMPIE Mask

Definition at line 825 of file Nano1X2Series.h.

◆ ADC_CMPR_CMPIE_Pos

#define ADC_CMPR_CMPIE_Pos   (1)

ADC_T::CMPR: CMPIE Position

Definition at line 824 of file Nano1X2Series.h.

◆ ADC_CMPR_CMPMATCNT_Msk

#define ADC_CMPR_CMPMATCNT_Msk   (0xful << ADC_CMPR_CMPMATCNT_Pos)

ADC_T::CMPR: CMPMATCNT Mask

Definition at line 834 of file Nano1X2Series.h.

◆ ADC_CMPR_CMPMATCNT_Pos

#define ADC_CMPR_CMPMATCNT_Pos   (8)

ADC_T::CMPR: CMPMATCNT Position

Definition at line 833 of file Nano1X2Series.h.

◆ ADC_CR_ADEN_Msk

#define ADC_CR_ADEN_Msk   (0x1ul << ADC_CR_ADEN_Pos)

ADC_T::CR: ADEN Mask

Definition at line 777 of file Nano1X2Series.h.

◆ ADC_CR_ADEN_Pos

#define ADC_CR_ADEN_Pos   (0)

ADC_T::CR: ADEN Position

Definition at line 776 of file Nano1X2Series.h.

◆ ADC_CR_ADIE_Msk

#define ADC_CR_ADIE_Msk   (0x1ul << ADC_CR_ADIE_Pos)

ADC_T::CR: ADIE Mask

Definition at line 780 of file Nano1X2Series.h.

◆ ADC_CR_ADIE_Pos

#define ADC_CR_ADIE_Pos   (1)

ADC_T::CR: ADIE Position

Definition at line 779 of file Nano1X2Series.h.

◆ ADC_CR_ADMD_Msk

#define ADC_CR_ADMD_Msk   (0x3ul << ADC_CR_ADMD_Pos)

ADC_T::CR: ADMD Mask

Definition at line 783 of file Nano1X2Series.h.

◆ ADC_CR_ADMD_Pos

#define ADC_CR_ADMD_Pos   (2)

ADC_T::CR: ADMD Position

Definition at line 782 of file Nano1X2Series.h.

◆ ADC_CR_ADST_Msk

#define ADC_CR_ADST_Msk   (0x1ul << ADC_CR_ADST_Pos)

ADC_T::CR: ADST Mask

Definition at line 801 of file Nano1X2Series.h.

◆ ADC_CR_ADST_Pos

#define ADC_CR_ADST_Pos   (11)

ADC_T::CR: ADST Position

Definition at line 800 of file Nano1X2Series.h.

◆ ADC_CR_DIFF_Msk

#define ADC_CR_DIFF_Msk   (0x1ul << ADC_CR_DIFF_Pos)

ADC_T::CR: DIFF Mask

Definition at line 798 of file Nano1X2Series.h.

◆ ADC_CR_DIFF_Pos

#define ADC_CR_DIFF_Pos   (10)

ADC_T::CR: DIFF Position

Definition at line 797 of file Nano1X2Series.h.

◆ ADC_CR_PTEN_Msk

#define ADC_CR_PTEN_Msk   (0x1ul << ADC_CR_PTEN_Pos)

ADC_T::CR: PTEN Mask

Definition at line 795 of file Nano1X2Series.h.

◆ ADC_CR_PTEN_Pos

#define ADC_CR_PTEN_Pos   (9)

ADC_T::CR: PTEN Position

Definition at line 794 of file Nano1X2Series.h.

◆ ADC_CR_REFSEL_Msk

#define ADC_CR_REFSEL_Msk   (0x3ul << ADC_CR_REFSEL_Pos)

ADC_T::CR: REFSEL Mask

Definition at line 810 of file Nano1X2Series.h.

◆ ADC_CR_REFSEL_Pos

#define ADC_CR_REFSEL_Pos   (16)

ADC_T::CR: REFSEL Position

Definition at line 809 of file Nano1X2Series.h.

◆ ADC_CR_RESSEL_Msk

#define ADC_CR_RESSEL_Msk   (0x3ul << ADC_CR_RESSEL_Pos)

ADC_T::CR: RESSEL Mask

Definition at line 813 of file Nano1X2Series.h.

◆ ADC_CR_RESSEL_Pos

#define ADC_CR_RESSEL_Pos   (18)

ADC_T::CR: RESSEL Position

Definition at line 812 of file Nano1X2Series.h.

◆ ADC_CR_TMPDMACNT_Msk

#define ADC_CR_TMPDMACNT_Msk   (0xfful << ADC_CR_TMPDMACNT_Pos)

ADC_T::CR: TMPDMACNT Mask

Definition at line 816 of file Nano1X2Series.h.

◆ ADC_CR_TMPDMACNT_Pos

#define ADC_CR_TMPDMACNT_Pos   (24)

ADC_T::CR: TMPDMACNT Position

Definition at line 815 of file Nano1X2Series.h.

◆ ADC_CR_TMSEL_Msk

#define ADC_CR_TMSEL_Msk   (0x3ul << ADC_CR_TMSEL_Pos)

ADC_T::CR: TMSEL Mask

Definition at line 804 of file Nano1X2Series.h.

◆ ADC_CR_TMSEL_Pos

#define ADC_CR_TMSEL_Pos   (12)

ADC_T::CR: TMSEL Position

Definition at line 803 of file Nano1X2Series.h.

◆ ADC_CR_TMTRGMOD_Msk

#define ADC_CR_TMTRGMOD_Msk   (0x1ul << ADC_CR_TMTRGMOD_Pos)

ADC_T::CR: TMTRGMOD Mask

Definition at line 807 of file Nano1X2Series.h.

◆ ADC_CR_TMTRGMOD_Pos

#define ADC_CR_TMTRGMOD_Pos   (15)

ADC_T::CR: TMTRGMOD Position

Definition at line 806 of file Nano1X2Series.h.

◆ ADC_CR_TRGCOND_Msk

#define ADC_CR_TRGCOND_Msk   (0x3ul << ADC_CR_TRGCOND_Pos)

ADC_T::CR: TRGCOND Mask

Definition at line 789 of file Nano1X2Series.h.

◆ ADC_CR_TRGCOND_Pos

#define ADC_CR_TRGCOND_Pos   (6)

ADC_T::CR: TRGCOND Position

Definition at line 788 of file Nano1X2Series.h.

◆ ADC_CR_TRGE_Msk

#define ADC_CR_TRGE_Msk   (0x1ul << ADC_CR_TRGE_Pos)

ADC_T::CR: TRGE Mask

Definition at line 792 of file Nano1X2Series.h.

◆ ADC_CR_TRGE_Pos

#define ADC_CR_TRGE_Pos   (8)

ADC_T::CR: TRGE Position

Definition at line 791 of file Nano1X2Series.h.

◆ ADC_CR_TRGS_Msk

#define ADC_CR_TRGS_Msk   (0x3ul << ADC_CR_TRGS_Pos)

ADC_T::CR: TRGS Mask

Definition at line 786 of file Nano1X2Series.h.

◆ ADC_CR_TRGS_Pos

#define ADC_CR_TRGS_Pos   (4)

ADC_T::CR: TRGS Position

Definition at line 785 of file Nano1X2Series.h.

◆ ADC_PDMA_AD_PDMA_Msk

#define ADC_PDMA_AD_PDMA_Msk   (0xffful << ADC_PDMA_AD_PDMA_Pos)

ADC_T::PDMA: AD_PDMA Mask

Definition at line 858 of file Nano1X2Series.h.

◆ ADC_PDMA_AD_PDMA_Pos

#define ADC_PDMA_AD_PDMA_Pos   (0)

ADC_T::PDMA: AD_PDMA Position

Definition at line 857 of file Nano1X2Series.h.

◆ ADC_PWRCTL_PWDCALEN_Msk

#define ADC_PWRCTL_PWDCALEN_Msk   (0x1ul << ADC_PWRCTL_PWDCALEN_Pos)

ADC_T::PWRCTL: PWDCALEN Mask

Definition at line 864 of file Nano1X2Series.h.

◆ ADC_PWRCTL_PWDCALEN_Pos

#define ADC_PWRCTL_PWDCALEN_Pos   (1)

ADC_T::PWRCTL: PWDCALEN Position

Definition at line 863 of file Nano1X2Series.h.

◆ ADC_PWRCTL_PWDMOD_Msk

#define ADC_PWRCTL_PWDMOD_Msk   (0x3ul << ADC_PWRCTL_PWDMOD_Pos)

ADC_T::PWRCTL: PWDMOD Mask

Definition at line 867 of file Nano1X2Series.h.

◆ ADC_PWRCTL_PWDMOD_Pos

#define ADC_PWRCTL_PWDMOD_Pos   (2)

ADC_T::PWRCTL: PWDMOD Position

Definition at line 866 of file Nano1X2Series.h.

◆ ADC_PWRCTL_PWUPRDY_Msk

#define ADC_PWRCTL_PWUPRDY_Msk   (0x1ul << ADC_PWRCTL_PWUPRDY_Pos)

ADC_T::PWRCTL: PWUPRDY Mask

Definition at line 861 of file Nano1X2Series.h.

◆ ADC_PWRCTL_PWUPRDY_Pos

#define ADC_PWRCTL_PWUPRDY_Pos   (0)

ADC_T::PWRCTL: PWUPRDY Position

Definition at line 860 of file Nano1X2Series.h.

◆ ADC_RESULT_OVERRUN_Msk

#define ADC_RESULT_OVERRUN_Msk   (0x1ul << ADC_RESULT_OVERRUN_Pos)

ADC_T::RESULT: OVERRUN Mask

Definition at line 774 of file Nano1X2Series.h.

◆ ADC_RESULT_OVERRUN_Pos

#define ADC_RESULT_OVERRUN_Pos   (17)

ADC_T::RESULT: OVERRUN Position

Definition at line 773 of file Nano1X2Series.h.

◆ ADC_RESULT_RSLT_Msk

#define ADC_RESULT_RSLT_Msk   (0xffful << ADC_RESULT_RSLT_Pos)

ADC_T::RESULT: RSLT Mask

Definition at line 768 of file Nano1X2Series.h.

◆ ADC_RESULT_RSLT_Pos

#define ADC_RESULT_RSLT_Pos   (0)
@addtogroup ADC_CONST ADC Bit Field Definition
Constant Definitions for ADC Controller

ADC_T::RESULT: RSLT Position

Definition at line 767 of file Nano1X2Series.h.

◆ ADC_RESULT_VALID_Msk

#define ADC_RESULT_VALID_Msk   (0x1ul << ADC_RESULT_VALID_Pos)

ADC_T::RESULT: VALID Mask

Definition at line 771 of file Nano1X2Series.h.

◆ ADC_RESULT_VALID_Pos

#define ADC_RESULT_VALID_Pos   (16)

ADC_T::RESULT: VALID Position

Definition at line 770 of file Nano1X2Series.h.

◆ ADC_SMPLCNT0_CH0SAMPCNT_Msk

#define ADC_SMPLCNT0_CH0SAMPCNT_Msk   (0xful << ADC_SMPLCNT0_CH0SAMPCNT_Pos)

ADC_T::SMPLCNT0: CH0SAMPCNT Mask

Definition at line 885 of file Nano1X2Series.h.

◆ ADC_SMPLCNT0_CH0SAMPCNT_Pos

#define ADC_SMPLCNT0_CH0SAMPCNT_Pos   (0)

ADC_T::SMPLCNT0: CH0SAMPCNT Position

Definition at line 884 of file Nano1X2Series.h.

◆ ADC_SMPLCNT1_CH8SAMPCNT_Msk

#define ADC_SMPLCNT1_CH8SAMPCNT_Msk   (0xful << ADC_SMPLCNT1_CH8SAMPCNT_Pos)

ADC_T::SMPLCNT1: CH8SAMPCNT Mask

Definition at line 888 of file Nano1X2Series.h.

◆ ADC_SMPLCNT1_CH8SAMPCNT_Pos

#define ADC_SMPLCNT1_CH8SAMPCNT_Pos   (0)

ADC_T::SMPLCNT1: CH8SAMPCNT Position

Definition at line 887 of file Nano1X2Series.h.

◆ ADC_SMPLCNT1_INTCHSAMPCNT_Msk

#define ADC_SMPLCNT1_INTCHSAMPCNT_Msk   (0xful << ADC_SMPLCNT1_INTCHSAMPCNT_Pos)

ADC_T::SMPLCNT1: INTCHSAMPCNT Mask

Definition at line 891 of file Nano1X2Series.h.

◆ ADC_SMPLCNT1_INTCHSAMPCNT_Pos

#define ADC_SMPLCNT1_INTCHSAMPCNT_Pos   (16)

ADC_T::SMPLCNT1: INTCHSAMPCNT Position

Definition at line 890 of file Nano1X2Series.h.

◆ ADC_SR_ADF_Msk

#define ADC_SR_ADF_Msk   (0x1ul << ADC_SR_ADF_Pos)

ADC_T::SR: ADF Mask

Definition at line 840 of file Nano1X2Series.h.

◆ ADC_SR_ADF_Pos

#define ADC_SR_ADF_Pos   (0)

ADC_T::SR: ADF Position

Definition at line 839 of file Nano1X2Series.h.

◆ ADC_SR_BUSY_Msk

#define ADC_SR_BUSY_Msk   (0x1ul << ADC_SR_BUSY_Pos)

ADC_T::SR: BUSY Mask

Definition at line 849 of file Nano1X2Series.h.

◆ ADC_SR_BUSY_Pos

#define ADC_SR_BUSY_Pos   (3)

ADC_T::SR: BUSY Position

Definition at line 848 of file Nano1X2Series.h.

◆ ADC_SR_CHANNEL_Msk

#define ADC_SR_CHANNEL_Msk   (0x1ful << ADC_SR_CHANNEL_Pos)

ADC_T::SR: CHANNEL Mask

Definition at line 852 of file Nano1X2Series.h.

◆ ADC_SR_CHANNEL_Pos

#define ADC_SR_CHANNEL_Pos   (4)

ADC_T::SR: CHANNEL Position

Definition at line 851 of file Nano1X2Series.h.

◆ ADC_SR_CMPF0_Msk

#define ADC_SR_CMPF0_Msk   (0x1ul << ADC_SR_CMPF0_Pos)

ADC_T::SR: CMPF0 Mask

Definition at line 843 of file Nano1X2Series.h.

◆ ADC_SR_CMPF0_Pos

#define ADC_SR_CMPF0_Pos   (1)

ADC_T::SR: CMPF0 Position

Definition at line 842 of file Nano1X2Series.h.

◆ ADC_SR_CMPF1_Msk

#define ADC_SR_CMPF1_Msk   (0x1ul << ADC_SR_CMPF1_Pos)

ADC_T::SR: CMPF1 Mask

Definition at line 846 of file Nano1X2Series.h.

◆ ADC_SR_CMPF1_Pos

#define ADC_SR_CMPF1_Pos   (2)

ADC_T::SR: CMPF1 Position

Definition at line 845 of file Nano1X2Series.h.

◆ ADC_SR_INITRDY_Msk

#define ADC_SR_INITRDY_Msk   (0x1ul << ADC_SR_INITRDY_Pos)

ADC_T::SR: INITRDY Mask

Definition at line 855 of file Nano1X2Series.h.

◆ ADC_SR_INITRDY_Pos

#define ADC_SR_INITRDY_Pos   (16)

ADC_T::SR: INITRDY Position

Definition at line 854 of file Nano1X2Series.h.

Typedef Documentation

◆ IRQn_Type

typedef enum IRQn IRQn_Type

Interrupt Number Definition. The maximum of 32 Specific Interrupts are possible.

Enumeration Type Documentation

◆ IRQn

enum IRQn

Interrupt Number Definition. The maximum of 32 Specific Interrupts are possible.

Enumerator
NonMaskableInt_IRQn 

2 Non Maskable Interrupt

HardFault_IRQn 

3 Cortex-M0 Hard Fault Interrupt

SVCall_IRQn 

11 Cortex-M0 SV Call Interrupt

PendSV_IRQn 

14 Cortex-M0 Pend SV Interrupt

SysTick_IRQn 

15 Cortex-M0 System Tick Interrupt

BOD_IRQn 

Brownout low voltage detected interrupt

WDT_IRQn 

Watch Dog Timer interrupt

EINT0_IRQn 

External signal interrupt from PB.14 pin

EINT1_IRQn 

External signal interrupt from PB.15 pin

GPABC_IRQn 

External signal interrupt from PA[15:0]/PB[13:0]/PC[15:0]

GPDEF_IRQn 

External interrupt from PD[15:0]/PE[15:0]/PF[15:0]

PWM0_IRQn 

PWM 0 interrupt

TMR0_IRQn 

Timer 0 interrupt

TMR1_IRQn 

Timer 1 interrupt

TMR2_IRQn 

Timer 2 interrupt

TMR3_IRQn 

Timer 3 interrupt

UART0_IRQn 

UART0 interrupt

UART1_IRQn 

UART1 interrupt

SPI0_IRQn 

SPI0 interrupt

SPI1_IRQn 

SPI1 interrupt

HIRC_IRQn 

HIRC interrupt

I2C0_IRQn 

I2C0 interrupt

I2C1_IRQn 

I2C1 interrupt

SC0_IRQn 

Smart Card 0 interrupt

SC1_IRQn 

Smart Card 1 interrupt

LCD_IRQn 

LCD interrupt

PDMA_IRQn 

PDMA interrupt

PDWU_IRQn 

Power Down Wake up interrupt

ADC_IRQn 

ADC interrupt

ACMP_IRQn 

Analog Comparator interrupt

RTC_IRQn 

Real time clock interrupt

Definition at line 77 of file Nano1X2Series.h.