M480 BSP
V3.05.006
The Board Support Package for M480 Series
Device
Nuvoton
M480
Include
hsotg_reg.h
Go to the documentation of this file.
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/**************************************************************************/
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#ifndef __HSOTG_REG_H__
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#define __HSOTG_REG_H__
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#if defined ( __CC_ARM )
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#pragma anon_unions
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#endif
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typedef
struct
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{
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__IO uint32_t
CTL
;
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__IO uint32_t
PHYCTL
;
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__IO uint32_t
INTEN
;
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__IO uint32_t
INTSTS
;
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__I uint32_t
STATUS
;
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}
HSOTG_T
;
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#define HSOTG_CTL_VBUSDROP_Pos (0)
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#define HSOTG_CTL_VBUSDROP_Msk (0x1ul << HSOTG_CTL_VBUSDROP_Pos)
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#define HSOTG_CTL_BUSREQ_Pos (1)
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#define HSOTG_CTL_BUSREQ_Msk (0x1ul << HSOTG_CTL_BUSREQ_Pos)
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#define HSOTG_CTL_HNPREQEN_Pos (2)
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#define HSOTG_CTL_HNPREQEN_Msk (0x1ul << HSOTG_CTL_HNPREQEN_Pos)
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#define HSOTG_CTL_OTGEN_Pos (4)
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#define HSOTG_CTL_OTGEN_Msk (0x1ul << HSOTG_CTL_OTGEN_Pos)
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#define HSOTG_CTL_WKEN_Pos (5)
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#define HSOTG_CTL_WKEN_Msk (0x1ul << HSOTG_CTL_WKEN_Pos)
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#define HSOTG_PHYCTL_OTGPHYEN_Pos (0)
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#define HSOTG_PHYCTL_OTGPHYEN_Msk (0x1ul << HSOTG_PHYCTL_OTGPHYEN_Pos)
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#define HSOTG_PHYCTL_IDDETEN_Pos (1)
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#define HSOTG_PHYCTL_IDDETEN_Msk (0x1ul << HSOTG_PHYCTL_IDDETEN_Pos)
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#define HSOTG_PHYCTL_VBENPOL_Pos (4)
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#define HSOTG_PHYCTL_VBENPOL_Msk (0x1ul << HSOTG_PHYCTL_VBENPOL_Pos)
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#define HSOTG_PHYCTL_VBSTSPOL_Pos (5)
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#define HSOTG_PHYCTL_VBSTSPOL_Msk (0x1ul << HSOTG_PHYCTL_VBSTSPOL_Pos)
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#define HSOTG_INTEN_ROLECHGIEN_Pos (0)
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#define HSOTG_INTEN_ROLECHGIEN_Msk (0x1ul << HSOTG_INTEN_ROLECHGIEN_Pos)
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#define HSOTG_INTEN_VBEIEN_Pos (1)
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#define HSOTG_INTEN_VBEIEN_Msk (0x1ul << HSOTG_INTEN_VBEIEN_Pos)
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#define HSOTG_INTEN_SRPFIEN_Pos (2)
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#define HSOTG_INTEN_SRPFIEN_Msk (0x1ul << HSOTG_INTEN_SRPFIEN_Pos)
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#define HSOTG_INTEN_HNPFIEN_Pos (3)
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#define HSOTG_INTEN_HNPFIEN_Msk (0x1ul << HSOTG_INTEN_HNPFIEN_Pos)
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#define HSOTG_INTEN_GOIDLEIEN_Pos (4)
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#define HSOTG_INTEN_GOIDLEIEN_Msk (0x1ul << HSOTG_INTEN_GOIDLEIEN_Pos)
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#define HSOTG_INTEN_IDCHGIEN_Pos (5)
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#define HSOTG_INTEN_IDCHGIEN_Msk (0x1ul << HSOTG_INTEN_IDCHGIEN_Pos)
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#define HSOTG_INTEN_PDEVIEN_Pos (6)
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#define HSOTG_INTEN_PDEVIEN_Msk (0x1ul << HSOTG_INTEN_PDEVIEN_Pos)
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#define HSOTG_INTEN_HOSTIEN_Pos (7)
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#define HSOTG_INTEN_HOSTIEN_Msk (0x1ul << HSOTG_INTEN_HOSTIEN_Pos)
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#define HSOTG_INTEN_BVLDCHGIEN_Pos (8)
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#define HSOTG_INTEN_BVLDCHGIEN_Msk (0x1ul << HSOTG_INTEN_BVLDCHGIEN_Pos)
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#define HSOTG_INTEN_AVLDCHGIEN_Pos (9)
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#define HSOTG_INTEN_AVLDCHGIEN_Msk (0x1ul << HSOTG_INTEN_AVLDCHGIEN_Pos)
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#define HSOTG_INTEN_VBCHGIEN_Pos (10)
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#define HSOTG_INTEN_VBCHGIEN_Msk (0x1ul << HSOTG_INTEN_VBCHGIEN_Pos)
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#define HSOTG_INTEN_SECHGIEN_Pos (11)
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#define HSOTG_INTEN_SECHGIEN_Msk (0x1ul << HSOTG_INTEN_SECHGIEN_Pos)
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#define HSOTG_INTEN_SRPDETIEN_Pos (13)
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#define HSOTG_INTEN_SRPDETIEN_Msk (0x1ul << HSOTG_INTEN_SRPDETIEN_Pos)
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#define HSOTG_INTSTS_ROLECHGIF_Pos (0)
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#define HSOTG_INTSTS_ROLECHGIF_Msk (0x1ul << HSOTG_INTSTS_ROLECHGIF_Pos)
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#define HSOTG_INTSTS_VBEIF_Pos (1)
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#define HSOTG_INTSTS_VBEIF_Msk (0x1ul << HSOTG_INTSTS_VBEIF_Pos)
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#define HSOTG_INTSTS_SRPFIF_Pos (2)
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#define HSOTG_INTSTS_SRPFIF_Msk (0x1ul << HSOTG_INTSTS_SRPFIF_Pos)
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#define HSOTG_INTSTS_HNPFIF_Pos (3)
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#define HSOTG_INTSTS_HNPFIF_Msk (0x1ul << HSOTG_INTSTS_HNPFIF_Pos)
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#define HSOTG_INTSTS_GOIDLEIF_Pos (4)
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#define HSOTG_INTSTS_GOIDLEIF_Msk (0x1ul << HSOTG_INTSTS_GOIDLEIF_Pos)
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#define HSOTG_INTSTS_IDCHGIF_Pos (5)
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#define HSOTG_INTSTS_IDCHGIF_Msk (0x1ul << HSOTG_INTSTS_IDCHGIF_Pos)
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#define HSOTG_INTSTS_PDEVIF_Pos (6)
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#define HSOTG_INTSTS_PDEVIF_Msk (0x1ul << HSOTG_INTSTS_PDEVIF_Pos)
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#define HSOTG_INTSTS_HOSTIF_Pos (7)
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#define HSOTG_INTSTS_HOSTIF_Msk (0x1ul << HSOTG_INTSTS_HOSTIF_Pos)
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#define HSOTG_INTSTS_BVLDCHGIF_Pos (8)
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#define HSOTG_INTSTS_BVLDCHGIF_Msk (0x1ul << HSOTG_INTSTS_BVLDCHGIF_Pos)
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#define HSOTG_INTSTS_AVLDCHGIF_Pos (9)
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#define HSOTG_INTSTS_AVLDCHGIF_Msk (0x1ul << HSOTG_INTSTS_AVLDCHGIF_Pos)
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#define HSOTG_INTSTS_VBCHGIF_Pos (10)
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#define HSOTG_INTSTS_VBCHGIF_Msk (0x1ul << HSOTG_INTSTS_VBCHGIF_Pos)
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#define HSOTG_INTSTS_SECHGIF_Pos (11)
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#define HSOTG_INTSTS_SECHGIF_Msk (0x1ul << HSOTG_INTSTS_SECHGIF_Pos)
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#define HSOTG_INTSTS_SRPDETIF_Pos (13)
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#define HSOTG_INTSTS_SRPDETIF_Msk (0x1ul << HSOTG_INTSTS_SRPDETIF_Pos)
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#define HSOTG_STATUS_OVERCUR_Pos (0)
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#define HSOTG_STATUS_OVERCUR_Msk (0x1ul << HSOTG_STATUS_OVERCUR_Pos)
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#define HSOTG_STATUS_IDSTS_Pos (1)
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#define HSOTG_STATUS_IDSTS_Msk (0x1ul << HSOTG_STATUS_IDSTS_Pos)
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#define HSOTG_STATUS_SESSEND_Pos (2)
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#define HSOTG_STATUS_SESSEND_Msk (0x1ul << HSOTG_STATUS_SESSEND_Pos)
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#define HSOTG_STATUS_BVLD_Pos (3)
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#define HSOTG_STATUS_BVLD_Msk (0x1ul << HSOTG_STATUS_BVLD_Pos)
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#define HSOTG_STATUS_AVLD_Pos (4)
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#define HSOTG_STATUS_AVLD_Msk (0x1ul << HSOTG_STATUS_AVLD_Pos)
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#define HSOTG_STATUS_VBUSVLD_Pos (5)
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#define HSOTG_STATUS_VBUSVLD_Msk (0x1ul << HSOTG_STATUS_VBUSVLD_Pos)
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#define HSOTG_STATUS_ASPERI_Pos (6)
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#define HSOTG_STATUS_ASPERI_Msk (0x1ul << HSOTG_STATUS_ASPERI_Pos)
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#define HSOTG_STATUS_ASHOST_Pos (7)
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#define HSOTG_STATUS_ASHOST_Msk (0x1ul << HSOTG_STATUS_ASHOST_Pos)
/* HSOTG_CONST */
/* end of HSOTG register group */
/* end of REGISTER group */
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#if defined ( __CC_ARM )
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#pragma no_anon_unions
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#endif
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#endif
/* __HSOTG_REG_H__ */
HSOTG_T
Definition:
hsotg_reg.h:27
HSOTG_T::CTL
__IO uint32_t CTL
Definition:
hsotg_reg.h:523
HSOTG_T::STATUS
__I uint32_t STATUS
Definition:
hsotg_reg.h:527
HSOTG_T::PHYCTL
__IO uint32_t PHYCTL
Definition:
hsotg_reg.h:524
HSOTG_T::INTEN
__IO uint32_t INTEN
Definition:
hsotg_reg.h:525
HSOTG_T::INTSTS
__IO uint32_t INTSTS
Definition:
hsotg_reg.h:526
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